Semiconductor device

  • Inventors: AOMURA KUNIO
  • Assignees: Nec Corp
  • Publication Date: December 01, 1989
  • Publication Number: JP-H01298731-A

Abstract

PURPOSE: To obtain a semiconductor device in which the area of a pellet can be reduced by providing a plurality of rows of bonding pads in a partial region along the end side of the pellet, and alternately disposing the protrusions of one row of the pads and the protrusions of the other row in the extending direction of the row. CONSTITUTION: A predetermined number of second row of bonding pads 15 are formed at the rear of a first row of bonding pads 13. Wedge-shaped protrusions of one row of the bonding pads 13 or 15 are extended between the other rows of the bonding pads 15 or 13. Accordingly, the protrusions of the first and second rows of the pads 13, 15 are alternately disposed along the extending direction of the row. Accordingly, since the first and second rows of the pads 13, 15 are formed substantially in wedge shape at both opposite sides, the first and second rows of the pads 13, 15 can be disposed in a state that they are maintained at a predetermined interval nearer than those of conventional ones. COPYRIGHT: (C)1989,JPO&Japio

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Cited By (11)

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    EP-2942809-A1November 11, 2015Renesas Electronics CorporationHalbleiterbauelement mit mehreren anschlussflächen und verfahren zur herstellung des halbleiterbauelements
    JP-H04364051-ADecember 16, 1992Rohm Co LtdSemiconductor device
    US-5818114-AOctober 06, 1998Hewlett-Packard CompanyRadially staggered bond pad arrangements for integrated circuit pad circuitry
    US-5834849-ANovember 10, 1998Altera CorporationHigh density integrated circuit pad structures
    US-5925935-AJuly 20, 1999Samsung Electronics Co., Ltd.Semiconductor chip with shaped bonding pads
    US-6281567-B1August 28, 2001Shinko Electric Industries Co., Ltd.Substrate for mounting semiconductor chip with parallel conductive lines
    US-6784558-B2August 31, 2004Intel CorporationSemiconductor device inlcluding optimized driver layout for integrated circuit with staggered bond pads
    US-7317244-B2January 08, 2008Oki Electric Industry Co., Ltd.Semiconductor device and manufacturing method thereof
    US-9391035-B2July 12, 2016Renesas Electronics CorporationSemiconductor device and method of manufacturing the same
    US-9761541-B2September 12, 2017Renesas Electronics CorporationSemiconductor device and method of manufacturing the same