PURPOSE: To increase the data transfer speed by shortening the time when two buses are simultaneously occupied while the data are read out between both buses in a system.
CONSTITUTION: When the address information on a read request is received from a bus A, the data are read out of a bus B. At the same time, a pre-read address added with '1' through a pre-read address generating circuit 2 is stored in a pre-read address register 3. Then the data are stored in a pre-read data register 7 from the bus B based on the pre-read address information. When the address information on the next reed request is received, a comparator 5 compares the address information with the pre-read address information and transmits the data to the bus A from the register 7 when the coincidence is obtained between both information.